| 招聘职位： | DFT Design Engineer |
| 学历要求： | Bachelor degree or above |
| 性别要求： | - |
| 招聘人数： | 0 |
| 工作地点： | - |
| 工作时间： | 0 |
| 工资范围 | 0 |
| 职位介绍： | Primary Responsibility: Lead definition, implementation and verification of Design for Test (DFT) logic on high-performance ASIC designs. Targeted designs will include 90nm, 65nm and beyond. Involvement in architecting necessary test solution and driving tool, flow, and methodology improvements. Support ASIC execution and customer through cost effective, on-schedule, and first-time correct definition, implementation, and verification of DFT on leading ASIC designs Qualifications: Bachelor degree or above in EE major Minimum 3 year related experience with a solid DFT experience on IC designs. Experienced in DFT tools such as Synopsys DFT Compiler and TetraMAX or Mentor Graphics DFT Advisor and FastScan for scan-insertion and ATPG on ASIC designs. Implement leading edge memory test solutions using tools such as LogicVision memBIST and Mentor Graphics MBIST. Familiar with chip level test structure, JTAG (1149.1 and 1149.6) and boundary scan essential. Scripting experience in Perl and tcl is highly preferred. Good command of English Good command of Unix |
| 接收简历邮箱： | china-recruiting@ti.com |
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